RTLPreCheck reads raw SystemVerilog and generates formally proven properties automatically. No specifications. No manual assertions. No naming conventions. Just structure.
Traditional formal verification asks: given this spec, does the design comply? RTLPreCheck asks the opposite: given this design, what must be true? The structure reveals buffers, arbiters, pipelines, and exactly which formal properties each one must satisfy.
Reads raw RTL. Classifies every register cluster by behavioral role using AST topology, graph structure, and IR metadata alone.
Selects formal property templates for each classification. Register stability, deadlock freedom, drain liveness, mutual exclusion — all generated from structure.
Every property is proven via k-induction. Sound abstract models are built automatically for large modules. Anti-vacuity covers verify every proof is exercised.
Cross-module assume-guarantee contracts are extracted from proven probes and discharged automatically via geometry-based port matching.
Channel Data Processor from NVIDIA's Deep Learning Accelerator. LUT-based activation functions, floating-point conversion, and post-processing pipeline.
April 3, 2026
124 modules analyzed across the full CDP hierarchy — 2,023 registers, LUT register banks, HLS floating-point libraries, interpolation units, and data conversion pipeline. Same binary that verified CDMA. Cold start, zero configuration, reproducible every run.
CDMA moved data without transforming it — 0/0 data signal properties. CDP transforms data through LUT-based activation functions and floating-point conversion. 16/16 data signal properties verified at 100%. RTLPreCheck generates and proves structural properties on data-carrying signals, not just control flow.
405 unique contract edges discharged across 124 modules. Port connections validated across the full hierarchy (100% netlist completeness). External inputs cataloged as integration boundary candidates. Zero manual assume-guarantee pairs. Port matching over RTL wiring topology using structural geometry. Validated against Slang elaborated IR.
If you're working on a design that needs formal verification coverage, or if you'd like to see RTLPreCheck run on your RTL, reach out.
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